IBIS Macromodel Task Group Meeting date: 6 March 2012 Members (asterisk for those attending): Agilent: * Fangyi Rao * Radek Biernacki Altera: * David Banas Ansys: Samuel Mertens * Dan Dvorscak Curtis Clark Arrow Electronics: Ian Dodd Cadence Design Systems: Terry Jernberg * Ambrish Varma Feras Al-Hawari Celsionix: Kellee Crisafulli Cisco Systems: Ashwin Vasudevan Syed Huq Ericsson: Anders Ekholm IBM: Greg Edlund Intel: Michael Mirmak LSI Logic: Wenyi Jin Maxim Integrated Products: * Mahbubul Bari Mentor Graphics: * John Angulo Zhen Mu * Arpad Muranyi Vladimir Dmitriev-Zdorov Micron Technology: * Randy Wolff NetLogic Microsystems: Ryan Couts Nokia-Siemens Networks: Eckhard Lenski QLogic Corp. * James Zhou Sigrity: Brad Brim Kumar Keshavan Ken Willis SiSoft: Walter Katz Todd Westerhoff Doug Burns Mike LaBonte Snowbush IP: Marcus Van Ierssel ST Micro: Syed Sadeghi Teraspeed Consulting Group: Scott McMorrow * Bob Ross TI: Casey Morrison Alfred Chong Vitesse Semiconductor: Eric Sweetman Xilinx: Mustansir Fanaswalla The meeting was lead by Arpad Muranyi ------------------------------------------------------------------------ Opens: - Arpad noted that Randy Wolff volunteered to take the minutes today. -------------------------- Call for patent disclosure: - None ------------- Review of ARs: - Arpad to write a new revision of BIRD 117 and 118 to generalize references to parameters in files (.ami or any) - in progress, mostly done with draft but previewers asked him to add more examples demonstrating needs Adge Hawes was showing in the last Summit. ------------- New Discussion: BIRD145.2 Ambrish: Changes to the BIRD were for EDA tools to make use of power/ground pins assumptions. He added that the model developer needs to guarentee that the External Circuit contains the appropriate circuitry to deliver the required power to each of the voltage reference ports. This was in response to Walter's questions last week. James: It is not clear how to make the external circuit connect to the pins for the power connections. Arpad: The port map uses the pin name (implicit die pad). The EDA tool assumes a die pad for the pin. James: In IBIS 5.0 Figure 12, the pad names shown are different than pin names in the diagram. Arpad: Figure 12 on page 136 has a few forward looking things not spelled out in the spec yet such as forking or joining paths. Package modeling doesn't yet allow descriptions of explicit pad to pin connections. Arpad: The new thing in BIRD145 is the [Model Call] keyword to instantiate [Model]s and connect them to [External Circuit]s. BIRD145 also allows the connection of reserved power names of [Model] to be connected to on-die nodes declared by [Node Declaration] which was not possible before. James: Is there a reason why we don't include the analog port names in the current spec? Bob: It is a hierarchy issue. No mechanism exists to control [External Circuit] with the traditional methods. Arpad: Also, there are no I-V and V-t curve keywords in [External Circuit], so reserved analog node names related to [Model] didn't make sense. Bob: There are also limits with [External Model] with only 7 node connections. James: How do you hook it up and then, how do you drive these signals? He thought driving of [External Circuit]s was the same as legacy IBIS. Arpad: Relating to Figure 12, if [External Circuit] connects 10 different buffers to 10 different pins, there isn't a mechanism to specify the Signal_Pins for the 10 buffers. It only works with one buffer either single ended or differential. Mapping needs to be defined. James: Mapping for power is almost never one-to-one. If you impose this limit, then the model maker must lump together the power pads. Arpad: BIRD125 implements a mechanism to define the die side node names for the package. Bob: There is no limit that [Circuit Call] at this point couldn't connect 100 different buffers to 100 different supplies. You lose the signal connection which is the core problem, but there is no limit to hooking up a 100 pin circuit for the power connections. Arpad: BIRD116 allows the same power delivery capability as BIRD144. Bob: BIRD144/145 does allow hookup of an SSO simulation using S-params and [Model]s without going through SPICE. Arpad: Walter had an idea of adding the B-element to IBIS-ISS. This would allow for the same capabilities as BIRD145. Ambrish: Will [External Circuit] always use IBIS-ISS? Arpad: No, they could be many languages. Radek: The idea of the B-element in IBIS-ISS sounds attractive, but we need to be careful about levels of interconnection. Arpad: Exactly, we need to be careful to not make a circular reference. Bob: Whether or not these are solutions for SerDes, he likes to see a simple method to include Touchstone and treat S-parameters as an intereconnect structure to model PDN networks for SSO. Radek: We should try to clean up the language of ports and nodes in the spec. Arpad: Unfortunately, we have had to use words from other specifications such as Verilog and VHDL which may not be technically correct. James: Users need to look for things in the file, so if you wrap a model in several layers from B-element to IBIS-ISS and back to IBIS, it gets confusing. Arpad: So you see the idea of cascading models as a simpler alternative to using B-elements in ISS subcircuits under [External Circuit] using the BIRD116 proposal? BIRD 145 is a subset in some ways, but not a replacement. Do we need to do any more to the document to prepare it for a vote? James: The issue of mapping of [External Circuit] pads to pins is not unique to this BIRD, but maybe we need to mention it. Arpad: Suggests to mention this issue with die pad to package pin mapping in the 'Any Other Background Information' section of the BIRD. Arpad: Focus will be on BIRD144 and other topics next week. ------------- Next meeting: 13 Mar 2012 12:00pm PT Next agenda: 1) Task list item discussions ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives